The present invention relates to a circuit for analyzing and comparing binary signals.
Comparison circuits for comparing binary signals are well known in the art. These comparison circuits compare two binary signal sets, respective bit by respective bit, and provide an indication of whether the binary signal sets are logically the same or not, i.e., whether all the respective bits of each binary signal set are logically the same. The result that the two binary signal sets are not the same is obtained irrespective of whether all respective bits of the two signal sets are not the same, or if only one or less than all of the respective bits of the two signal sets are not the same. Thus, it is not possible to ascertain from the output of such comparison circuits information relative to the comparison of individual respective bits of the two signal sets, or information relative to portions of the two signal sets.
For example, if it is desired in a computer system to determine the existence of a specified address on an address bus, a comparison circuit loaded with the specified address is coupled to the address bus and indicates whether the specified address was present on the bus or not. If the specified address was not present, it was not possible to analyze the addresses present on the bus in an attempt to determine what was occurring. Therefore, should the exact address be found to be non-existent, it was not possible for the user to determine simply from the comparison circuit what was taking place on the address bus, i.e., whether there was an address logically close to the specified address.
So far as applicant is aware, comparison circuits which compare binary signal sets to, and which also permit analysis of the comparison of individual respective bits of the signal sets, are not commercially available. While it might be possible to utilize existing integrated comparison circuits and an array of gates cascading the comparison circuits, such an arrangement would generate intolerable propagation delays and therefore be unacceptable.
Thus, there is a need for a circuit in which comparison of individual respective bits of the two signal sets being compared, or portions of the two signal sets being compared, can be analyzed, as well as for determining whether the two binary signal sets are logically the same or not.